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Renesas Electronics Launches Industry’s First Radiation Hardened Single-Chip Synchronous Buck and Low Dropout Regulator for Satellite Power Applications


30 Jan 2020

 Renesas Electronics Corporation announced the industry’s first single-chip synchronous buck and low dropout (LDO) regulator targeting low-power FPGAs, DDR memory and other digital loads for spaceflight payload applications. The ISL70005SEH is the only point-of-load (POL) power solution that reduces size, weight, and power (SWaP) by integrating a synch buck and LDO in one monolithic IC. The device enables satellite manufacturers to reduce bill of materials (BOM) and power supply footprint for their medium Earth orbit (MEO) and geosynchronous Earth orbit (GEO) long duration mission profiles.

The ISL70005SEH rad-hard dual output POL regulator combines 95 percent high efficiency with the synch buck regulator and a low 75mV dropout on the LDO regulator. The device enables easier thermal management for systems with 3.3V or 5V power buses and can support 3A continuous output load current for the buck regulator and ±1A for the LDO. The buck regulator uses a voltage mode control architecture and switches at a resistor adjustable frequency of 100kHz to 1MHz, enabling a smaller filter size.

“The ISL70005SEH gives satellite manufacturers the superior radiation performance, and SWaP and BOM savings they want,” said Philip Chesley, Vice President, Industrial and Communications Business Division at Renesas. “Our dual output POL regulator also provides the configurability to address multiple applications in commercial telecommunication satellites, military satcom satellites, and science and exploration missions.”

The space-grade ISL70005SEH simplifies design configuration allowing designers to use it as a dual output regulator, DDR memory power solution or high efficiency low noise regulator for RF applications. The flexible LDO can source and sink current and accept input voltages as low as 775mV to reduce unnecessary power dissipation. The externally adjustable loop compensation on the buck allows users to achieve an optimal balance of stability and output dynamic performance. The device is wafer acceptance tested to 100krad(Si) over high dose rate (HDR) and tested for ELDRS up to 75krad(Si) over low dose rate (LDR). Single event effects (SEE) testing shows no single event latch-up (SEL) and single event burnout (SEB) at a linear energy transfer (LET) up to 86MeVcm2/mg. Single event transients (SETs) have been characterized at a LET range of 8.5 to 86MeVcm2/mg.

 



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